Power Aware Based on Voltage Islands for X-Clock Tree Construction

Chia-Chun Tsai

This paper proposes an algorithm of power aware based on voltage islands for constructing an X-clock tree with considering double via insertion. Different voltages are assigned for multiple voltage islands for power aware to reduce total power consumption under the clock delay control. Higher rate of double via insertion is made for via-effect avoidance and reliability. We first partition a clock network to be the number of voltage islands, such as L-type or T-type, and construct the X-clock tree for each voltage island with double via insertion. Then, we combine these X-clock trees based on a well-defined connection with inserted level shifters for minimizing the power. The delay effect due to the total number of inserted double vias is also accounted. Ten benchmarks are tested for our approach. Compared with single voltage island, experimental results show that our X-clock tree based on multi-voltage islands can save up to 21.58%, 4.75%, and 33.8% in power, delay, and running time, respectively.